Amplifier circuit with bias stage for controlling a common mode output voltage of the gain stage during device power-up
US7560987B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 30, 2006 |
| Grant date | Jul 14, 2009 |
| Priority date | — |
| Expiry date | Oct 1, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45728
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An improved amplifier circuit is provided herein with a gain stage and a bias stage, which may be switchably connected to the gain stage during power-up operations. The bias stage reduces a power-up time associated with the gain stage, while minimizing current consumption in the next amplifier stage and improving battery life. For example, during power-up, the bias stage may enable the output voltage of the gain stage to gradually rise from a ground potential to a desired common mode level in a highly controlled and predictable manner. By preventing “glitches” in the output voltage, the bias stage eliminates the need for inserting switches in the signal path between the output nodes of the gain stage and input nodes of the next amplifier stage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.