Device and method for protecting gate terminal and lead
US7561223B2 · kind B2 · utility
1Cited by
14References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 9, 2005 |
| Grant date | Jul 14, 2009 |
| Priority date | — |
| Expiry date | Jul 2, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/60
Abstract
A resist region covering the gate terminal and lead and between a passivation layer and a gate insulating layer is used to protect the gate terminal and lead. The resist region is located at a scribing line on margin of the color filter substrate of a panel, thereby the resist region can protect the passivation layer and the gate insulating layer from cracking, and the gate terminal and the lead from corrosion after a portion of the color filter substrate is removed along the scribing line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.