Patent · US Active

Hardware time stamping and processor synchronization

US7561559B2 · kind B2 · utility

22Cited by

11References

29Claims

0Family size

Assignee

Ixia · US

Inventors

Clifford Hannel · Thousand Oaks, US
Jan Olderdissen · Thousand Oaks, US
Doug Schafer · Craydon Court, US
Roger Standridge · Los Angeles, US

Key dates

Filing date	Mar 30, 2005
Grant date	Jul 14, 2009
Priority date	—
Expiry date	Jul 9, 2026

Classification

Technology area (CPC H)Electricity
CPC primaryH04L43/50
WIPO fieldDigital communication
WIPO sectorElectrical engineering

Abstract

Hardware time stamping is disclosed. In a method, a transmit time stamp may be added to an outgoing data unit in hardware prior to transmitting the outgoing data unit over a communications medium. The outgoing data unit may be received from a processor and may be intended for a node. The outgoing data unit may be transmitted over the communications medium to the node. An incoming data unit may be received over the communications medium. A receive time stamp may be added to the incoming data unit in hardware before the incoming data unit is provided to the processor. The method may be achieved on a hardware device included on a board in a network testing system.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.