Cache protocol enhancements in a proximity communication-based off-chip cache memory architecture
US7562190B1 · kind B1 · utility
6Cited by
12References
19Claims
0Family size
Assignee
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Key dates
| Filing date | Jun 17, 2005 |
| Grant date | Jul 14, 2009 |
| Priority date | — |
| Expiry date | Aug 4, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0831
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A proximity interconnect module includes a plurality of processors operatively connected to a plurality of off-chip cache memories by proximity communication. Due to the high bandwidth capability of proximity interconnect, enhancements to the cache protocol to improve latency may be made despite resulting increased bandwidth consumption.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.