Device to cluster Boolean functions for clock gating
US7562325B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 24, 2008 |
| Grant date | Jul 14, 2009 |
| Priority date | — |
| Expiry date | Sep 24, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2117/04
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system for clustering Boolean functions for clock gating according to various exemplary embodiments can include a computer configured to identify at least two small gating groups within a clock tree representative of an electrical network and at least two gating functions of the at least two small gating groups, wherein the at least two gating functions are Boolean functions; perform hierarchical clustering on the at least two gating functions using a similarity measure that describes a distance between the at least two gating functions such that the clustering forms a merge function of a cluster generated and displayed in a form of a dendrogram; assign to each gating domain a merit value according to a power consumption profile of the gating domain using a merit function; and partition the cluster into gating groups using the dendrogram to construct a directed acyclic graph to determine a partition which maximize the overall power saving.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.