Patent · US Active

Method of manufacturing printed circuit board for fine circuit formation

US7562447B2 · kind B2 · utility

2Cited by
3References
7Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMar 27, 2007
Grant dateJul 21, 2009
Priority date
Expiry dateSep 13, 2027

Classification

  • Technology area (CPC Y)Emerging Cross-Sectional Technologies
  • CPC primaryY10T29/49165
  • WIPO fieldAudio-visual technology
  • WIPO sectorElectrical engineering

Abstract

Disclosed is a method of manufacturing a printed circuit board for fine circuit formation, in which an unnecessary metal layer formed on the upper portion of a circuit pattern is removed through mechanical polishing and then chemical etching. In place of expensive chemical mechanical polishing, in the method of the invention, mechanical polishing and chemical etching are continuously applied to thus sequentially remove and planarize the unnecessary metal layer. Thereby, through an inexpensive, simple, and continuous process, the planarization procedure can be precisely performed, thus making it possible to apply the method to large areas and economically realize a fine circuit pattern.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.