Integrated sensor and circuitry and process therefor
US7562573B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jul 20, 2006 |
| Grant date | Jul 21, 2009 |
| Priority date | — |
| Expiry date | Sep 11, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/16235
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A micromachined sensor and a process for fabrication and vertical integration of a sensor and circuitry at wafer-level. The process entails processing a first wafer to incompletely define a sensing structure in a first surface thereof, processing a second wafer to define circuitry on a surface thereof, bonding the first and second wafers together, and then etching the first wafer to complete the sensing structure, including the release of a member relative to the second wafer. The first wafer is preferably a silicon-on-insulator (SOI) wafer, and the sensing structure preferably includes a member containing conductive and insulator layers of the SOI wafer. Sets of capacitively coupled elements are preferably formed from a first of the conductive layers to define a symmetric capacitive full-bridge structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.