Method of fabricating poly-crystalline silicon thin film and method of fabricating transistor using the same
US7563659B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 6, 2004 |
| Grant date | Jul 21, 2009 |
| Priority date | — |
| Expiry date | Oct 26, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6745
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of fabricating a poly-Si thin film and a method of fabricating a poly-Si TFT using the same are provided. The poly-Si thin film is formed at a low temperature using inductively coupled plasma chemical vapor deposition (ICP-CVD). After the ICP-CVD, excimer laser annealing (ELA) is performed while increasing energy by predetermined steps. A poly-Si active layer and a SiO2 gate insulating layer are deposited at a temperature of about 150° C. using ICP-CVD. The poly-Si has a large grain size of about 3000 Å or more. An interface trap density of the SiO2 can be as high as 1011/cm2. A transistor having good electrical characteristics can be fabricated at a low temperature and thus can be formed on a heat tolerant plastic substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.