Process for manufacturing an array of cells including selection bipolar junction transistors
US7563684B2 · kind B2 · utility
Inventors
Key dates
| Filing date | Nov 1, 2005 |
| Grant date | Jul 21, 2009 |
| Priority date | — |
| Expiry date | Oct 22, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B63/10
Abstract
A process for manufacturing an array of cells, including: implanting, in a body of semiconductor material of a first conductivity type, a common conduction region of the first conductivity type; forming, in the body, above the common conduction region, a plurality of active area regions of a second conductivity type and a first doping level; forming, on top of the body, an insulating layer having first and second openings; implanting first portions of the active area regions through the first openings with a doping agent of the first conductivity type, thereby forming, in the active area regions, second conduction regions of the first conductivity type; implanting second portions of the active area regions through the second openings with a doping agent of the second conductivity type, thereby forming control contact regions of the second conductivity type and a second doping level, higher than the first doping level; forming, on top of the body, a plurality of storage components, each storage component having a terminal connected to a respective second conduction region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.