Method and apparatus to enhance linearity and efficiency in an RF power amplifier
US7564311B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 28, 2007 |
| Grant date | Jul 21, 2009 |
| Priority date | — |
| Expiry date | Sep 28, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F1/3205
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Dynamic biasing techniques are used to enhance both linearity and efficiency within a transistor power amplifier. In at least one embodiment, as the power level being processed by a transistor increases toward a saturation point, a transistor is moved from class B or class AB operation toward class A operation. This increases the linearity of operation (because class A operation is typically highly linear) without a corresponding decrease in efficiency (because efficiency typically peaks near saturation). Similarly, as the power level decreases from the saturation point, the transistor is moved from class A or class AB operation toward class B operation. This increases the efficiency (because class B operation is more efficient than class A or AB), while having little effect on linearity (because operation is moving away from saturation).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.