Buffer for A/D conversion
US7564394B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 7, 2007 |
| Grant date | Jul 21, 2009 |
| Priority date | — |
| Expiry date | Aug 7, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/12
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A buffer for the input to an A/D converter operates in two stages. During the first stage, the input is not provided directly to the A/D converter; rather, a buffered output which corresponds to the input is provided to the A/D converter so as to pre-charge the sampling capacitor of the A/D converter to a value that is substantially close to the input. In the second stage, the input is provided directly to the A/D converter, which charges its sampling capacitor to the value of the input. Because the sampling capacitor is pre-charged to a value that is substantially close to the input, and because the sampling capacitor is charged to this value through a buffer, reflections back into the input which otherwise might have been caused by a difference between the value stored on the sampling capacitor and the input are largely avoided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.