Semiconductor device with NMOS transistors arranged continuously
US7569894B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | May 16, 2006 |
| Grant date | Aug 4, 2009 |
| Priority date | — |
| Expiry date | Oct 21, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/10
Abstract
A semiconductor device includes a plurality of PMOS transistors formed on a semiconductor substrate; and a plurality of NMOS transistors formed on the semiconductor substrate. The plurality of PMOS transistors are electrically isolated from each other by a device isolation structure formed in the semiconductor substrate. The plurality of NMOS transistors are continuously formed in a first direction such that a sequence of N-type diffusion layers of the plurality of NMOS transistors extends in the first direction. One of the plurality of PMOS transistors and one of the plurality of NMOS transistors share a gate electrode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.