Ternary content addressable memory (TCAM) cells with low signal line numbers
US7570503B1 · kind B1 · utility
9Cited by
33References
6Claims
0Family size
Assignee
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Key dates
| Filing date | May 22, 2006 |
| Grant date | Aug 4, 2009 |
| Priority date | — |
| Expiry date | Aug 23, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C15/04
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A ternary content addressable memory (TCAM) cell circuit formed in a TCAM memory cell array having cells arranged in rows and columns can include a first storage circuit with first and second data path, a second storage circuit with a third and fourth data path, and a compare circuit. No more than four conductive lines in a column wise direction have a direct electrical connection to the TCAM cell. Such conductive lines can include a first bit line coupled to the first data path and the third data path and a second bit line coupled to the second data path and the fourth data path.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.