Transistor array substrate and display panel
US7573068B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 21, 2005 |
| Grant date | Aug 11, 2009 |
| Priority date | — |
| Expiry date | Oct 30, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/441
Abstract
A transistor array substrate includes a plurality of driving transistors which are arrayed in a matrix on a substrate. The driving transistor has a gate, a source, a drain, and a gate insulating film inserted between the gate, and the source and drain. A plurality of signal lines are patterned together with the gates of the driving transistors and arrayed to run in a predetermined direction on the substrate. A plurality of supply lines are patterned together with the sources and drains of the driving transistors and arrayed to cross the signal lines via the gate insulating film. The supply line is electrically connected to one of the source and the drain of the driving transistor. A plurality of feed interconnections are formed on the supply lines along the supply lines, respectively.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.