Window via capacitors
US7573698B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 7, 2006 |
| Grant date | Aug 11, 2009 |
| Priority date | — |
| Expiry date | Jul 20, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01G4/232
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A method of forming a window via capacitor comprises a first step of providing a plurality of interleaved dielectric layers and paired electrode layers to create a multilayered arrangement characterized by top and bottom surfaces and a plurality pf side surfaces. First and second transition layer electrode portions are provided on a top surface of the multilayered arrangement on top of which a cover layer formed to define openings, or windows, therein is provided. The cover layer may be provided before device firing or may be printed on after firing using polymer or glass. Peripheral terminations are subsequently formed on the device periphery to connect selected electrode layers to respective transition layer electrode portions. Via terminations are formed in the cover layer openings, on top of which solder balls may be applied. Some of the terminations may be formed in accordance with various plating techniques as disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.