Digital component power savings in a host device and method
US7574553B2 · kind B2 · utility
5Cited by
1References
16Claims
0Family size
Inventors
Key dates
| Filing date | Jun 16, 2006 |
| Grant date | Aug 11, 2009 |
| Priority date | — |
| Expiry date | Jul 20, 2027 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D30/50
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A control arrangement, for example, in a digital component that forms part of a system, draws an input current for its operation and is configured for monitoring an interface for any one of a group of commands and, upon detecting an issued one of the group of commands, operates the component for executing the issued command in an operational mode, and during an idle time on the interface, the control arrangement exclusively monitors the interface for any one of the group of commands such that the input current is limited to a leakage current. The component may draw less than 1 milliamp of current during the idle mode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.