Semiconductor integrated device and method of providing shield interconnection therein
US7576382B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 1, 2006 |
| Grant date | Aug 18, 2009 |
| Priority date | — |
| Expiry date | Mar 8, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of providing shield interconnection, the method shielding an interconnection pattern to be shielded with shield interconnection patterns for shielding on the substrate of a semiconductor integrated device, is disclosed. The method includes the steps of disposing multiple interconnection layers having the corresponding shield interconnection patterns formed therein so that the interconnection layers surround the interconnection pattern to be shielded; setting different potentials for at least a first one of the shield interconnection patterns formed in a first one of the interconnection layers and a second one of the shield interconnection patterns formed in a second one of the interconnection layers; and shielding the interconnection pattern to be shielded with the first one and the second one of the shield interconnection patterns.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.