Test socket and test board for wafer level semiconductor testing
US7576551B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 20, 2007 |
| Grant date | Aug 18, 2009 |
| Priority date | — |
| Expiry date | Nov 27, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15311
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A test board for wafer level semiconductor testing is disclosed. The test board comprises a plurality of wires and microelectronic devices; and a plurality of test sockets on an upper surface of the test board. Each test socket comprises: a base member configured for attachment to the test board with a first set of screws, wherein the base member has a central opening exposing a portion of the underlying test board; an anisotropic conductive film disposed within the central opening of the base member; a chip to be tested, disposed on the anisotropic conductive film within the central opening of the base member; and a cover member overlying the chip, attached to the base member with a second set of screws.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.