Clock generators for generation of in-phase and quadrature clock signals
US7576584B2 · kind B2 · utility
2Cited by
13References
2Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 14, 2007 |
| Grant date | Aug 18, 2009 |
| Priority date | — |
| Expiry date | Dec 14, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K23/44
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Clock generator embodiments are provided to generate half-rate I and Q clock signals. The generators are configured to insure fan-out limitations, to insure correct phasing at startup, to reduce the number of signal inverters in a critical path, and to reduce the total number of inverter structures to thereby substantially extend generator operational frequency. An exemplary generator embodiment requires only two tri-state inverters and four inverters. These clock generators are particularly suited for variety of electronic systems such as high speed data serializers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.