Digital PWM amplifier having a low delay corrector
US7576606B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 25, 2007 |
| Grant date | Aug 18, 2009 |
| Priority date | — |
| Expiry date | Aug 5, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F3/217
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Systems and methods for performance improvements in digital switching amplifiers using a low delay corrector. In one embodiment, a digital pulse width modulation (PWM) amplifier includes a signal processing plant configured to receive and process an input audio signal. The amplifier also includes a low delay corrector configured to receive signals output by the plant. The output of the low delay corrector is added to the input audio signal as feedback. The plant may consist of a modulator and power switch, a noise shaper, or any other type of plant. An analog-to-digital converter (ADC) may be provided to convert the output audio signal to a digital signal. Filtering may be implemented before or after the ADC, and a decimator may be placed after the ADC if it is an oversampling ADC.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.