Patent · US Active

Memory interface to bridge memory buses

US7577039B2 · kind B2 · utility

34Cited by
17References
16Claims
0Family size

Assignee

Inventors

Key dates

Filing dateAug 10, 2006
Grant dateAug 18, 2009
Priority date
Expiry dateSep 2, 2027

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH05K1/181
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A memory interface to bridge a parallel memory bus and a serial memory bus. A printed circuit board includes at least one memory interface buffer chip to connect an advanced memory buffer (AMB) interface and one or more non-fully buffered memory modules.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.