Bit labeling for amplitude phase shift constellation used with low density parity check (LDPC) codes
US7577207B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 21, 2005 |
| Grant date | Aug 18, 2009 |
| Priority date | — |
| Expiry date | Jul 5, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/152
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An approach is provided for bit labeling of a signal constellation. A transmitter generates encoded signals using, according to one embodiment, a structured parity check matrix of a Low Density Parity Check (LDPC) code. The transmitter includes an encoder for transforming an input message into a codeword represented by a plurality of set of bits. The transmitter includes logic for mapping non-sequentially (e.g., interleaving) one set of bits into a higher order constellation (Quadrature Phase Shift Keying (QPSK), 8-PSK, 16-APSK (Amplitude Phase Shift Keying), 32-APSK, etc.), wherein a symbol of the higher order constellation corresponding to the one set of bits is output based on the mapping.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.