Duty cycle rejecting serializing multiplexer for output data drivers
US7577861B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 30, 2005 |
| Grant date | Aug 18, 2009 |
| Priority date | — |
| Expiry date | Jan 15, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4077
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus is described herein for serializing input data streams into an output data stream. A first and second input data stream are sampled upon rising edges of a first and second clocking signal, respectively, to reduce jitter from dependence on the falling edges of the clocking signals. The second clocking signal is 180 degrees out of phase with the first clocking signal to sample the first input data stream in the first unit interval of an output data stream and the second input data stream in the second unit interval of the output data stream. Consequently, a serialized output data stream is driven at twice the frequency of both the first and the second input data streams, including logical information from the first and second input data streams every period of the output data stream.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.