Apparatus with redundant circuitry and method therefor
US7577869B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 11, 2005 |
| Grant date | Aug 18, 2009 |
| Priority date | — |
| Expiry date | Sep 17, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/2048
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus with circuit redundancy includes a set of parallel arithmetic logic units (ALUs), a redundant parallel ALU, input data shifting logic that is coupled to the set of parallel ALUs and that is operatively coupled to the redundant parallel ALU. The input data shifting logic shifts input data for a defective ALU, in a first direction, to a neighboring ALU in the set. When the neighboring ALU is the last or end ALU in the set, the shifting logic continues to shift the input data for the end ALU that is not defective, to the redundant parallel ALU. The redundant parallel ALU then operates for the defective ALU. Output data shifting logic is coupled to an output of the parallel redundant ALU and all other ALU outputs to shift the output data in a second and opposite direction than the input shifting logic, to realign output of data for continued processing, including for storage or for further processing by other circuitry.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.