Patent · US Expired

Low distortion digital to analog converter and digital signal synthesizer systems

US7579971B2 · kind B2 · utility

8Cited by
13References
14Claims
0Family size

Inventors

Key dates

Filing dateJul 23, 2004
Grant dateAug 25, 2009
Priority date
Expiry dateJul 23, 2024

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03M1/661
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

The present invention is a digital to analog converter circuit that provides significantly lower distortion than achieved by digital to analog converter circuits having comparable speed and resolution utilizing the present art. The present invention provides linear or higher order transitions between clock transition time points rather than step transitions used in the present art. Distortion reduction can exceed 30 dB in the embodiment with linear sample-to-sample transitions and greater in alternate embodiments with non-linear transitions. In other embodiments, the present invention can provide low distortion at resolutions from 16 to 24 bits or more at sample rates typical of high-speed 8-bit devices of the present art.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.