High-pass dither generator and method
US7580157B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 30, 2006 |
| Grant date | Aug 25, 2009 |
| Priority date | — |
| Expiry date | Feb 19, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/66
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method and circuit for generating an M-bit digital dither signal with a substantially uniform probability density function and high-pass spectrum are disclosed. The circuit includes a linear feedback shift register (LFSR) with N storage elements where N>M, and a high-pass filter. The method involves sampling at least M storage elements of the LFSR with each clock cycle to form an M-bit LFSR output and high-pass filtering and the M-bit LFSR output to provide the M-bit dither signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.