Dynamic allocation method in digital signal processors
US7580413B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 23, 2004 |
| Grant date | Aug 25, 2009 |
| Priority date | — |
| Expiry date | Aug 18, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2209/5015
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention provides a dynamic allocation method in Digital Signal Processors (DSPs) for processing high and low data rate channels. Said method takes advantage of Software Defined Radio (SDR) library and the different requirements for processing high and low speed channels in radio communications, to combine the processing method of high data rate channels and the processing method of low data rate channels into one DSP cluster. Thus said method can process both high and low data rate channels simultaneously in the same DSP cluster. Said method can maintain the processing throughput of high data rate channels, while reducing latency on low data rate channels, so can improve the processing performance and save the cost.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.