Procedure and device for programming a DMA controller in which a translated physical address is stored in a buffer register of the address processing unit and then applied to the data bus and stored in a register of the DMA controller
US7581039B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 11, 2005 |
| Grant date | Aug 25, 2009 |
| Priority date | — |
| Expiry date | Jan 13, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/1081
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for programming a DMA controller of a system on a chip that includes a CPU, an MMU, and a DMA controller including source, destination, and size registers associated with a base subaddress. In response to a first instruction of a user program that includes a virtual address, the virtual address is translated into a corresponding physical address, and the physical address is stored in a buffer register that is inaccessible to the user program. In response to a second instruction of the user program, the physical address stored in the buffer register is applied to the data bus and a first word including high-order bits indicating the base subaddress is applied to the address bus. The source or destination register is selected according to the first word applied to the address bus and the physical address applied to the data bus is stored in the selected register.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.