High electron mobility transistor semiconductor device and fabrication method thereof
US7582518B2 · kind B2 · utility
1Cited by
9References
14Claims
0Family size
Assignee
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Key dates
| Filing date | Nov 14, 2006 |
| Grant date | Sep 1, 2009 |
| Priority date | — |
| Expiry date | Apr 24, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/411
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In a method of forming a semiconductor device on a semiconductor substrate (100), a photoresist layer (102) is deposited on the semiconductor substrate; a window (106) is formed in the photoresist layer (102) by electron beam lithography; a conformal layer (108) is deposited on the photoresist layer (102) and in the window (106); and substantially all of the conformal layer (108) is selectively removed from the photoresist layer (102) and a bottom portion of the window to form dielectric sidewalls (110) in the window (106).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.