Methods and arrangements for hybrid data storage
US7584335B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Nov 2, 2006 |
| Grant date | Sep 1, 2009 |
| Priority date | — |
| Expiry date | Sep 21, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/306
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Embodiments may comprise a hybrid memory controller to facilitate accesses of more than on type of memory device, referred to generally hereafter as a hybrid memory device or hybrid cache device. The hybrid memory controller may include split logic to determine whether to split data of a write request into more than one portion and to store each portion in a different type of data storage device. For example, one embodiment comprises a hybrid memory controller to store data in both SRAM and DRAM devices. The SRAM and DRAM devices may include distinct circuits on a die, distinct dies within a chip, distinct chips on a memory module, distinct memory modules, or the like.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.