Method of manufacturing a carbon nano-tube transistor
US7585718B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 31, 2007 |
| Grant date | Sep 8, 2009 |
| Priority date | — |
| Expiry date | Oct 31, 2027 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49105
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A multilayer insulating structure including a first stop layer, a first insulating layer and a second stop layer is formed on the first conductive structure. A second conductive structure and a second insulating layer are formed on the first conductive structure. The second insulating layer and the second conductive structure are etched to form a first hole and a second hole having a first radius. A spacer is formed on sidewalls of the first and second holes. The second stop layer and the first insulating layer are etched using the spacer as an etch mask to form a third hole having a second radius smaller than the first radius. A sacrificial filler is formed on the first stop layer to fill the third hole. After removing the spacer, the sacrificial filler is removed. The first stop layer is etched. A carbon nano-tube is grown from the first conductive structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.