Multistage cascade arbiter
US7586927B1 · kind B1 · utility
1Cited by
7References
9Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 4, 2003 |
| Grant date | Sep 8, 2009 |
| Priority date | — |
| Expiry date | Jul 3, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L49/3027
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Multiple comparators compare the enable and priority values for multiple inputs and select a winner from one of the inputs. Multiple comparator stages each include one or more of the comparators. Each comparator stage selects winners from the outputs of a preceding comparator stage. The overall winners are those inputs that are winners in each comparator stage. If there are multiple overall winners, a second arbitration is preformed to identify an ultimate winner.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.