Sound processor architecture using single port memory unit
US7587310B2 · kind B2 · utility
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17References
38Claims
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Key dates
| Filing date | Aug 30, 2004 |
| Grant date | Sep 8, 2009 |
| Priority date | — |
| Expiry date | Dec 20, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F3/16
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and method for implementing a sound processor. The sound processor includes a first voice engine, a second voice engine, and at least one single-port memory unit. An operation of the first voice engine and an operation of the second voice engine are time offset, wherein the time offset enables the first and second voice engines to share the at least one memory unit without contention. This results in cost savings and power consumption savings due to the smaller area needed for the memories.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.