Processor core interface for providing external hardware modules with access to registers of the core and methods thereof
US7587579B2 · kind B2 · utility
1Cited by
3References
16Claims
0Family size
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Key dates
| Filing date | Dec 28, 2004 |
| Grant date | Sep 8, 2009 |
| Priority date | — |
| Expiry date | Dec 28, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3891
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A processor core architecture includes a cluster having at least a register file and predefined functional units having access to the register file. The architecture also includes an interface to one or more arbitrary functional units external to the processor core. The interface is to provide the arbitrary functional units with access to the register file.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.