Method and apparatus for iterative error-erasure decoding
US7587657B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Apr 29, 2005 |
| Grant date | Sep 8, 2009 |
| Priority date | — |
| Expiry date | Oct 4, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/154
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Methods and apparatus are provided for improved iterative error-erasure decoding. A signal is decoded by obtaining a plurality of symbols associated with the signal and one or more corresponding reliability values; generating at least one erasure list comprised of L symbols and at least one shortened erasure list comprised of L′ symbols, where L′ is less than L; and constructing an erasure set by taking erasures from at least one of the erasure list and the shortened erasure list. A signal is also processed by generating one or more reliability values using a soft-output detector; generating an erasure list of symbols by comparing the reliability values to at least one reliability threshold value (or by sorting); and performing error erasure decoding using the erasure list. The size of the erasure list can optionally be adjusted using feedback information.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.