CMOS image sensor with asymmetric well structure of source follower
US7589349B2 · kind B2 · utility
37Cited by
2References
10Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Dec 29, 2005 |
| Grant date | Sep 15, 2009 |
| Priority date | — |
| Expiry date | Aug 12, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10F39/80
Abstract
Provided is a CMOS image sensor with an asymmetric well structure of a source follower. The CMOS image sensor includes: a well disposed in an active region of a substrate; a drive transistor having one terminal connected to a power voltage and a first gate electrode disposed to cross the well; and a select transistor having a drain-source junction between another terminal of the drive transistor and an output node, and a second gate electrode disposed in parallel to the drive transistor. A drain region of the drive transistor and a source region of the select transistor are asymmetrically arranged.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.