Method of maintaining input and/or output configuration and data states during and when coming out of a low power mode
US7589564B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 13, 2008 |
| Grant date | Sep 15, 2009 |
| Priority date | — |
| Expiry date | Feb 13, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/24
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor integrated circuit device upon exiting from a low power mode, wakes up and re-initializes logic circuits so as to restore previous logic states of internal registers without disturbing input-output (I/O) configuration control and data states present at the time the low power mode was entered. Thus not distributing the operation of other devices connected to the semiconductor integrated circuit device previously in the low power mode. Once all internal logic and registers of the semiconductor integrated circuit device have been re-initialized, a “low power state wake-up and restore” signal may issue. This signal indicates that the I/O configuration control and data states stored in the I/O keeper cell at the time the integrated circuit device entered into the low power mode have been reinstated and control may be returned to the logic circuits and/or internal registers of the semiconductor integrated circuit device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.