System and method for synchronized current boosting
US7589570B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Oct 22, 2007 |
| Grant date | Sep 15, 2009 |
| Priority date | — |
| Expiry date | Nov 4, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/02
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A circuit system and method are provided to modify a hard disk writer/driver pre-amplifier electronic circuit to synchronize current boosting control signals. The circuit system obtains a single boosting control signal from a single source. Component boosting control signals, a positive and a negative boosting control signal are indirectly generated via processing through two independent intermediate circuits. The two boosting control signals are pulse shaped signals via intermediate circuits which generate the corresponding first and second intermediate output signals in a manner that the two intermediate output signals are made compatible with one another and particularly synchronize to be later combined by some manner of combiner circuit without the generation of unwanted components in the output signal. The circuit design includes changing a CMOS technology based writer/driver circuit to a BiCMOS technology based circuit in which an NMOS transistor receiving a negative boosting control is replaced by an equivalent bipolar NPN transistor and an appropriate biasing circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.