Amplifier circuit having stacked main amplifier and parallel sub-amplifier
US7589593B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 30, 2008 |
| Grant date | Sep 15, 2009 |
| Priority date | — |
| Expiry date | Jan 30, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2200/294
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An amplifier circuit for amplifying an input signal to generate an output signal is provided. The amplifier circuit has a stacked main amplifier, a parallel sub-amplifier, and a signal combiner. The stacked main amplifier includes a first amplifier unit for outputting a first amplified signal generated from processing the input signal; and a second amplifier unit for outputting a second amplified signal generated from processing the first amplified signal. The first amplifier unit and the second amplifier unit share bias current. The parallel sub-amplifier is coupled to the stacked main amplifier according to a parallel connection fashion, and outputs a third amplified signal generated from processing the input signal. The signal combiner combines the second amplified signal and the third amplified signal to generate the output signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.