Electrostatic discharge protection structures for high speed technologies with mixed and ultra-low voltage supplies
US7589944B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 26, 2004 |
| Grant date | Sep 15, 2009 |
| Priority date | — |
| Expiry date | Jul 26, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/305
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An electrostatic discharge (ESD) protection circuit in a semiconductor integrated circuit (IC) having protected circuitry. In one embodiment, the ESD protection circuit includes a pad adapted for connection to a first voltage source of a protected circuit node of the IC, and a silicon controlled rectifier (SCR) having an anode adapted for coupling to the first voltage source, and a cathode adapted for coupling to a second voltage source. At least one capacitive turn-on device respectively coupled between at least one of a first gate of the SCR and the first voltage source, and a second gate of the SCR and the second voltage source.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.