Multi-stage packet switching system
US7590102B2 · kind B2 · utility
24Cited by
15References
26Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jan 27, 2005 |
| Grant date | Sep 15, 2009 |
| Priority date | — |
| Expiry date | Nov 28, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L49/1523
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
In general, in one aspect, the disclosure describes a multi-stage switch having at least one ingress switch module to receive data and to generate frames that are transmitted as a wavelength division multiplexed signal. The multi-stage switch further includes a core switch module operatively connected to receive the wavelength division multiplexed signal from the at least one ingress switch module and to switch the frames. The multi-stage switch additionally includes at least one egress switch module to receive the wavelength division multiplexed signal from the core switch module and to transmit data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.