Reordering sequence based channels
US7590721B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 6, 2007 |
| Grant date | Sep 15, 2009 |
| Priority date | — |
| Expiry date | Dec 10, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L69/22
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
System for reordering packet segments in a switching network. A system is provided for reordering packet segments in a packet switch network, wherein a plurality of source processors transmit the packet segments to a destination processor via one or more network fabrics. The system comprises encoder logic at each source processor that operates to associate a unique segment identifier with each of the packet segments before they are transmitted. A memory and map logic located at the destination processor operate to receive the packet segments, map the segment identifier associated with each of the packet segments to a memory region in the memory, and store each received packet at its respective memory region. A Dequeue processor coupled to the memory operates to determine when enough packet segments are stored in the memory to form a complete data frame and outputs that frame.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.