Chip with IDE host and IDE slave and corresponding self-debugging function
US7590771B2 · kind B2 · utility
Inventor
Key dates
| Filing date | Nov 17, 2005 |
| Grant date | Sep 15, 2009 |
| Priority date | — |
| Expiry date | Apr 7, 2026 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A chip with IDE host and IDE slave and corresponding self-debugging function is provided. The chip simplifies IDE debugging of a chip, which comprises a front-end and a backend, by offering separate debugging modes for an IDE host and an IDE slave on the same chip. The front-end provides output data of an internal IDE slave or output data of an external IDE slave in response to a host debug enable signal. The backend is coupled to the front-end. The backend provides functions of an internal IDE host according to the output data of the internal IDE slave or the external IDE slave, or directs the output data of the internal IDE slave to an external IDE host in response to a slave debug enable signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.