Patent · US Active

Computer system

US7590990B2 · kind B2 · utility

0Cited by
3References
6Claims
0Family size

Assignee

Inventors

Key dates

Filing dateOct 17, 2005
Grant dateSep 15, 2009
Priority date
Expiry dateAug 16, 2027

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F9/45537
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A general-purpose OS (operating system) is used as a host OS and a real-time OS operating as one or more tasks on the host OS is used as a guest OS. An interrupt handler and a task on the host OS and an interrupt handler and a task on the guest OS issue APIs (application program interfaces) for requesting task state change to a start, stop or like state. An API processor is provided in each OS and outputs an instruction for task state change. An instruction storage for storing instructions output from an API processor of the guest OS in order and outputting the instructions is provided. When interrupt handlers are not in execution, an instruction synchronization timing controller preferentially selects from instructions output from the API processor of the host OS and from the instruction storage the latter and outputs the selected instruction to a scheduler.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.