Method for finding multi-cycle clock gating
US7594200B2 · kind B2 · utility
24Cited by
6References
4Claims
0Family size
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Key dates
| Filing date | Dec 19, 2005 |
| Grant date | Sep 22, 2009 |
| Priority date | — |
| Expiry date | Aug 12, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/30
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus includes a multi-cycle clock gater and a circuit design updater. The multi-cycle clock gater generates multi-cycle gating groups of data latching devices of a circuit design. The circuit design updater updates the circuit design with selected multi-cycle gating groups. Each gating group is associated with a single gating function. For each gating group, data latching devices of 0th level of the gating group are gated with the gating function and ith level data latching devices of the gating function are gated with ith latched versions of the gating function.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.