Bipolar transistors with vertical structures
US7595249B2 · kind B2 · utility
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14References
10Claims
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Assignee
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Key dates
| Filing date | Sep 29, 2008 |
| Grant date | Sep 29, 2009 |
| Priority date | — |
| Expiry date | Sep 29, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/85
Abstract
A method for fabricating a bipolar transistor includes forming a vertical sequence of semiconductor layers, forming an implant mask on the last formed semiconductor layer, and implanting dopant ions into a portion of one or more of the semiconductor layers. The sequence of semiconductor layers includes a collector layer, a base layer that is in contact with the collector layer, and an emitter layer that is in contact with the base layer. The implanting uses a process in which the implant mask stops dopant ions from penetrating into a portion of the sequence of layers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.