Method and apparatus for cassette integrity testing using a wafer sorter
US7596456B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 18, 2005 |
| Grant date | Sep 29, 2009 |
| Priority date | — |
| Expiry date | Apr 27, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/67271
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A system and methods for the evaluation of the integrity of a wafer cassette and the disposition thereof are based upon evaluation of wafer measurement data obtained using a wafer sorter cassette mapping system utilized in-line during wafer sorting operations. In one embodiment, wafers are placed into slots in the wafer cassette. A wafer sorter cassette mapping sensor is scanned over the wafers in the wafer cassette. The positions of the wafers are measured while scanning the sensor over the wafers. The wafer position measurements are evaluated using a modeling system to determine slot positions, and a determination of the integrity of the cassette is generated. If the integrity determination indicates that the cassette is deformed beyond a predetermined value, the cassette is replaced. The measurement data may be stored in a data base for further trend analysis or for replacement forecasting.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.