Method, system, and apparatus to decrease CPU temperature through I/O bus throttling
US7596638B2 · kind B2 · utility
11Cited by
8References
24Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 21, 2004 |
| Grant date | Sep 29, 2009 |
| Priority date | — |
| Expiry date | Aug 7, 2025 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method, apparatus, and system are disclosed. In one embodiment the method detects a temperature event in a processor and then modifies the bus frequency of an I/O bus coupled to an I/O controller hub in response to the temperature event. In another embodiment, the apparatus includes a temperature detection unit that detects a temperature event in a processor and, additionally, a bus frequency modification unit that will modify the bus frequency of an I/O bus in response to the temperature event.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.