CPU power management based on utilization with lowest performance mode at the mid-utilization range
US7596709B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 28, 2006 |
| Grant date | Sep 29, 2009 |
| Priority date | — |
| Expiry date | Oct 22, 2026 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A demand-based method and system of a processor power management is described. A processor is caused to enter a particular performance mode based on a first and a second utilization threshold. The particular performance mode includes at least a first performance mode, a second performance mode, and a third performance mode. The processor is caused to operate with a clock frequency in the third performance mode that is lower than the clock frequency of the processor in the first and second performance modes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.