Method of assembling a wafer-level package filter
US7596849B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 17, 2007 |
| Grant date | Oct 6, 2009 |
| Priority date | — |
| Expiry date | May 13, 2027 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/53283
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A wafer level package filter includes a device wafer having an acoustic wave device disposed on its surface, the acoustic wave device including at least an acoustic wave resonator associated with a piezoelectric substrate and a connecting pad. A capped substrate includes circuitry having inductors and capacitors. The capped substrate has a coefficient of thermal expansion significantly unequal to a coefficient of thermal expansion for the piezoelectric substrate. An adhesive bond connects the capped substrate to the device wafer for encapsulating the acoustic wave device within a cavity. A dielectric overcoat is deposited over a portion of the capped substrate, and a metallization layer extends over a portion of the dielectric layer connecting the capped substrate circuitry to a connecting pad of the acoustic wave device. Optionally, a bond connecting the capped substrate to the device wafer may provide an interlocking connection.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.